1. Field
Example embodiments may relate generally to flash storage devices. Example embodiments may relate generally to methods and systems of organizing address mapping tables based on Logical Block Address (LBA) sizes.
2. Description of Related Art
Flash storage devices may be deployed as data storage devices for electronic devices like personal digital assistants (PDAs), Moving Picture Experts Group (MPEG)-1 or MPEG-2 Audio Layer III (MP3) players, cameras, video games, robots, and the like due to their non-volatile nature, faster access speeds, form factor, low power consumption, and the like. The flash storage devices may generally be manufactured using two different logical technologies, namely—Not OR (NOR) flash storage and Not AND (NAND) flash storage. NOR-based flash storage may be commonly used in the Basic Input/Output System (BIOS) programs which run at start up on computing devices. The NAND-based flash storage device may be less expensive than NOR-based flash storage device, and the NAND-based flash storage devices may be capable of read and write operations sequentially at high speed. Further, due to lower cost and higher storage capacity, the NAND flash storage devices may be commonly used in Universal Serial Bus (USB) flash drives, digital cameras, audio and video players, and television (TV) set-top boxes.
NAND-based flash storage devices may use an intermediate Flash Translation Layer (FTL) to communicate between the file system on the host and the flash storage devices. Conventional FTLs may use different approaches like page-level mapping, block-level mapping, and hybrid mapping for mapping a logical page to a corresponding physical NAND-based flash page. In the block-level mapping, the FTL may map each Logical Block Number (LBN) to a Physical Block Number (PBN) in a block mapping table. An update to a page in the block mapping table may lead to erasure of the block containing the corresponding page. Hence, use of the block-level mapping may lead to poor performance, especially during extensive write operations. In page-level mapping, the FTL may map each Logical Page Number (LPN) to a Physical Page Number (PPN) in a page mapping table (PMT). The page-level mapping techniques may allow data to be written to any free page of the flash storage device. Unlike the block-level mapping, which may require constant block erasure, the page-level mapping may allow random write access operations without frequent block erasures.
Although page-level mapping techniques may provide several advantages in comparison to conventional mapping techniques like block-level mapping techniques, page-level mapping techniques may require a significant amount of memory to store the page mapping table. The allocation of excessive memory for the page mapping table may not be viable with the increasing cost-to-performance nature of the flash storage devices.